Deep Tech - The Future Begins Today

Deep Tech - The Future Begins Today

At this fall’s Intel Developers Conference, the buzz in the hallways was all about Nehalem - and, no, the assembled übergeeks weren’t iPhoning B&Bs at the sleepy Oregon hamlet of 208 hearty souls that nestles just 25 miles north of America’s best cheddar cheese. Hardly. Nehalem is Intel’s code name for its next generation of completely redesigned processors, scheduled to appear in mid-to-late 2008. Intel also announced that its next evolutionary processor, code-named Penryn (also the home of a granite quarry in Placer County, California), will begin shipping in quantity on November 12 of this year.


In Intel parlance, Penryn’s a tick and Nehalem’s a tock. Let me explain.


Engineers improve microprocessor power and performance in two basic ways. One is by reengineering the physical transistors that accomplish a chip’s digital mojo; the other is by improving the way a chip manages that mojo. The first defines a chip’s process; the second, its microarchitecture. The smaller and more efficient a process, the faster and more power-efficient a chip; the more intelligently designed a chip’s microarchitecture, the better it can accomplish its work. In what Intel refers to as its “tick-tock Silicon Cadence,” process improvements are the tick and microarchitectural improvements are the tock.


Penryn is based on the microarchitecture already used in the Core 2 Duo chip that powers today’s Macs, but improves that chip’s process by shrinking its transistors from 65 to 45 nanometers and making them more power-efficient (tick). Nehalem will use the same process as Penryn, but will be based on an entirely new microarchitecture (tock).


Nehalem’s microarchitectural improvements will be many and varied. In its first iteration, for example, it’ll contain up to eight separate microprocessor cores. Those cores, however, won’t necessarily be all peas-in-a-pod, as multicore processors currently are. Expect to see different types of highly power-efficient cores crowding a Nehalem chip, each optimized for a specific type of operation, be it high-precision number crunching or high-speed media management.


Nehalem will also inaugurate a far faster way of slamming data to and from your Mac’s memory. It’s a high-speed, point-to-point scheme called QuickPath, managed by a memory controller right on the Nehalem chip. As a result, your Mac’s frontside bus - the highway its processor uses to shuttle data back and forth with the rest of the system - will be replaced by multiple QuickPath channels. RAM-access speed is scheduled to improve by up to 300 percent.


What’s more, each Nehalem core will be able to process two streams (threads) of instructions at the same time - an encore of the Hyperthreading technology used in late-model Pentiums but which went AWOL in the Core 2 Duo. This simultaneous multithreading (SMT) will allow eight cores to perform like 16, but getting software to work efficiently with all that power will be no mean feat. So how does Intel plan to maximize SMT’s effectiveness? Tune in to Deep Tech next month, and I’ll tell you.




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Who wants cheddar if you can have Gouda?



Apparently the author of this story agrees with you PGM. Look at the caption on this page -



I live in Oregon, and Tillamook cheese really is the best cheddar you can get on this continent.


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